XC7Z010-1CLG400I Field Programmable Gate Array FPGA Chip SoC FPGA Core ARM Cortex A9
Brand Name:Xilinx
Model Number:XC7Z010-1CLG400I
Minimum Order Quantity:2pcs
Delivery Time:1-3work days
Payment Terms:T/T, Western Union, PayPay, MoneyGram
Place of Origin:Original
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Product Details
Zynq-7000 SoC
XC7Z010-1CLG400I FPGA Field Programmable Gate Array SoC FPGA Core ARM Cortex A9
Specifications
| Product Attribute | Attribute Value |
|---|---|
| Xilinx | |
| Product Category: | SoC FPGA |
| SMD/SMT | |
| CSBGA-400 | |
| ARM Cortex A9 | |
| 2 Core | |
| 667 MHz | |
| 2 x 32 kB | |
| 2 x 32 kB | |
| 28000 LE | |
| 100 I/O | |
| - 40 C | |
| + 100 C | |
| Brand: | Xilinx |
| Number of Logic Array Blocks - LABs: | 2200 LAB |
| Product Type: | Processors - Application Specialized |
Description
The Zynq®-7000 family is based on the Xilinx SoC architecture. These products integrate a feature-rich dual-core
or single-core ARM® Cortex™-A9 based processing system (PS) and 28 nm Xilinx programmable logic (PL) in a
single device. The ARM Cortex-A9 CPUs are the heart of the PS and also include on-chip memory, external memory
interfaces, and a rich set of peripheral connectivity interfaces.
Features
ARM Cortex-A9 Based Application Processor Unit (APU)
• 2.5 DMIPS/MHz per CPU
• CPU frequency: Up to 1 GHz
• Coherent multiprocessor support
• ARMv7-A architecture
• TrustZone® security
• Thumb®-2 instruction set
• Jazelle® RCT execution Environment Architecture
• NEON™ media-processing engine
• Single and double precision Vector Floating Point Unit (VFPU)
• CoreSight™ and Program Trace Macrocell (PTM)
• Timer and Interrupts
• Three watchdog timers
• One global timer
• Two triple-timer counters Caches
• 32 KB Level 1 4-way set-associative instruction and data caches (independent for each CPU)
• 512 KB 8-way set-associative Level 2 cache (shared between the CPUs)
• Byte-parity support On-Chip Memory
• On-chip boot ROM
• 256 KB on-chip RAM (OCM)
• Byte-parity support External Memory Interfaces
• Multiprotocol dynamic memory controller
• 16-bit or 32-bit interfaces to DDR3, DDR3L, DDR2, or LPDDR2 memories
• ECC support in 16-bit mode
• 1GB of address space using single rank of 8-, 16-, or 32-bit-wide memories
• Static memory interfaces
• 8-bit SRAM data bus with up to 64 MB support
• Parallel NOR flash support
• ONFI1.0 NAND flash support (1-bit ECC)
• 1-bit SPI, 2-bit SPI, 4-bit SPI (quad-SPI), or two quad-SPI (8-bit) serial NOR flash 8-Channel DMA Controller
• Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and scatter-gather transaction support
Trading Guide
| Shipping | Delivery period | For in-stock parts, orders are estimated to ship out in 3 days.Once
shipped, estimated delivery time depends on the below carriers you
chose: |
| Shipping rates | After confirming the order, we will evaluate the shipping cost based on the weight of the goods | |
| Shipping option | We provide DHL, FedEx, EMS, SF Express, and Registered Air Mail international shipping. | |
| Shipping tracking | We will notify you by email with tracking number once order is shipped. | |
Returning warranty | Returning | Returns are normally accepted when completed within 30 days from date of shipment.Parts should be unused and in original packaging.Customer has to take charge for the shipping. |
| Warranty | All Retechip purchases come with a 30-day money-back return policy, This warranty shall not apply to any item where defects have been caused by improper customer assembly,failure by customer to follow instructions, product modification, negligent or improper operation | |
| Ordering | Payment | T/T,PayPal, Credit Card includes Visa, Master, American Express. |
XC7Z010-1CLG400I Field Programmable Gate Array FPGA Chip SoC FPGA Core ARM Cortex A9
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