XC5VLX155T-1FF1738C 7632kbit 680 I/O Virtex FPGA
Brand Name:Xilinx Inc.
Certification:Lead free / RoHS Compliant
Model Number:XC5VLX155T-1FF1738C
Minimum Order Quantity:1 pcs
Delivery Time:3-5 Day
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XC5VLX155T-1FF1738C Xilinx FPGA Chip FBGA-1738 680 I/O Virtex-5
| Product Attribute | Attribute Value |
|---|---|
| Xilinx | |
| FPGA - Field Programmable Gate Array | |
| Virtex-5 | |
| 680 I/O | |
| 1 V | |
| 0 C | |
| + 85 C | |
| SMD/SMT | |
| FCBGA-1738 | |
| Data Rate: | 6.5 Gb/s |
| Series: | XC5VLX155T |
| Brand: | Xilinx |
| Distributed RAM: | 1640 kbit |
| Embedded Block RAM - EBR: | 7632 kbit |
| Maximum Operating Frequency: | 550 MHz |
| Moisture Sensitive: | Yes |
| Number of Transceivers: | 16 Transceiver |
| Product Type: | FPGA - Field Programmable Gate Array |
| Factory Pack Quantity: | 1 |
| Subcategory: | Programmable Logic ICs |
| Tradename: | Virtex |
Summary of Virtex-5 FPGA Features
• Designed to the IEEE 802.3-2002 specification
• Operates at 10, 100, and 1,000 Mb/s
• Supports tri-mode auto-negotiation
• Receive address filter (5 address entries)
• Fully monolithic 1000Base-X solution with RocketIO GTP transceivers
• Supports multiple external PHY connections (RGMII, GMII, etc.) interfaces through soft logic and SelectIO resources
• Supports connection to external PHY device through SGMII using soft logic and RocketIO GTP transceivers
• Receive and transmit statistics available through separate interface
• Separate host and client interfaces
• Support for jumbo frames
• Support for VLAN
• Flexible, user-configurable host interface
• Supports IEEE 802.3ah-2004 unidirectional mode
• 25 x 18 two’s complement multiplication
• Optional pipeline stages for enhanced performance
• Optional 48-bit accumulator for multiply accumulate (MACC) operation with optional accumulator cascade to 96-bits
• Integrated adder for complex-multiply or multiply-add operation
• Optional bitwise logical operation modes
• Independent C registers per slice
• Fully cascadable in a DSP column without external routing resources
• On-Chip temperature measurement (±4°C)
• On-Chip power supply measurement (±1%)
• Easy to use, self-contained
− No design required for basic operation
− Autonomous monitoring of all on-chip sensors
− User programmable alarm thresholds for on-chip
• Operates at 10, 100, and 1,000 Mb/s
• Supports tri-mode auto-negotiation
• Receive address filter (5 address entries)
• Fully monolithic 1000Base-X solution with RocketIO GTP transceivers
• Supports multiple external PHY connections (RGMII, GMII, etc.) interfaces through soft logic and SelectIO resources
• Supports connection to external PHY device through SGMII using soft logic and RocketIO GTP transceivers
• Receive and transmit statistics available through separate interface
• Separate host and client interfaces
• Support for jumbo frames
• Support for VLAN
• Flexible, user-configurable host interface
• Supports IEEE 802.3ah-2004 unidirectional mode
• 25 x 18 two’s complement multiplication
• Optional pipeline stages for enhanced performance
• Optional 48-bit accumulator for multiply accumulate (MACC) operation with optional accumulator cascade to 96-bits
• Integrated adder for complex-multiply or multiply-add operation
• Optional bitwise logical operation modes
• Independent C registers per slice
• Fully cascadable in a DSP column without external routing resources
• On-Chip temperature measurement (±4°C)
• On-Chip power supply measurement (±1%)
• Easy to use, self-contained
− No design required for basic operation
− Autonomous monitoring of all on-chip sensors
− User programmable alarm thresholds for on-chip
XC5VLX155T-1FF1738C 7632kbit 680 I/O Virtex FPGA
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